As our society rapidly develops into an information-oriented society, flat panel displays having the attributes of of slimness, low weight and low power consumption have become widely used. Among the various types of flat panel displays, the liquid crystal display (LCD) and the organic light emitting diode (OLED) device provide excellent resolution, color reproduction capability and image quality. Owing to these advantages, the LCD in particular is widely used in notebook computers and desktop computers.
The LCD operates by exploiting the optical anisotropy and polarization of liquid crystal molecules, or liquid crystals. Liquid crystals have an elongated thin molecular structure and tend to orient themselves in an orderly molecular arrangement. The orientation and direction of the molecular arrangement can be controlled by applying an electric field thereto.
Accordingly, it is possible to display images by suitably changing the molecular arrangement of the liquid crystals and utilizing their optical anisotropy to altering the polarization state of light.
The LCD includes two substrates positioned in opposition to each other with a liquid crystal layer interposed therebetween. Each substrate has an electrode for generating an electric field. The LCD displays images by controlling molecules of the liquid crystal layer using an electric field generated by a voltage applied to the electrodes of the respective substrates.
Specifically, an active matrix (AM) LCD includes on its lower substrate a thin film transistor (TFT), which serves as a switching device. Also, an AM OLED uses a TFT as a switching/driving device.
The active layer of such a TFT typically is made of amorphous silicon (a-Si) because the a-Si can be easily formed on an inexpensive large substrate such as glass at a low temperature.
FIGS. 1A to 1C are cross-sectional views illustrating a manufacturing process for a related art TFT.
Referring first to FIG. 1A, a conductive metal, for example, Al or AlNd, is deposited on a substrate 10 by a sputtering process or the like in order to form a metal layer on the substrate 10. Thereafter, the metal layer is patterned using photolithography, thereby forming a gate electrode 20 on the substrate 10.
Referring to FIG. 1B, a gate insulating layer 30 is formed on an entire surface of the substrate 10 in such a way as to cover the gate electrode 20 formed on the substrate 10. Typically, the gate insulating layer 30 is made of an amorphous insulating material such as SiNx.
Next, an a-Si layer 40 is deposited on the gate insulating layer 30 through chemical vapor deposition (CVD) Typically, the a-Si layer 40 is deposited to a thickness of about 2000 Å. Dopants are added to the a-Si layer 40 in order to form a doped a-Si (n+ a-Si) layer 50 on the a-Si layer 40. Typically, the n+ a-Si layer 50 is formed to a thickness of about 300 Å. When joined to metal, the n+ a-Si layer 50 exhibits an ohmic contact characteristic.
The a-Si layer 40 and the n+ a-Si layer 50 are patterned using anisotropic photolithography so that only a portion of the layers in the vicinity of the gate electrode 20 remain. Thus a portion of the gate insulating layer 30 corresponding to the removed portion of the layers 40 and 50 is exposed.
Referring to FIG. 1C, a thin metal layer is deposited and formed on the exposed gate insulating layer 30 over an entire surface of the substrate 100 in such a way as to cover the resulting n+ a-Si layer 50. Here, the thin metal layer is made of one selected from the group consisting of Cr, Mo, and Al and is formed to a thickness of 1500 Å.
At this time, since the n+ a-Si layer 50 in direct contact with the metal layer exhibits an ohmic contact characteristic, it is also called an ohmic contact layer 50.
Thereafter, a photoresist is coated on the thin metal layer. The coated photoresist is then exposed and developed in such a way as to form a photoresist pattern on portions of the thin metal layer corresponding to both sides of the gate electrode 20. The photoresist can be classified into a positive type photoresist whose exposed portion is developed (or removed) and a negative type photoresist whose exposed portion remains. In general, the positive-type photoresist is used in an array process.
By using the formed photoresist pattern as a mask, the thin metal layer is etched to expose the ohmic contact layer 50 through the resulting hole. Next, the exposed ohmic contact layer 50 is etched to expose the a-Si layer 40 therebeneath through the resulting hole.
Consequently, the non-exposed a-Si layer 40 becomes an active layer, the non-etched left and right portions of the thin metal layer respectively become a source electrode 60 and a drain electrode 65, and the exposed a-Si layer 40 becomes a channel region (ch).
The resulting a-Si TFT can be used in an AM LCD, an AM OLED, or the like. When the a-Si TFT is used in an AM LCD, the drain electrode 65 is connected to a pixel electrode in each pixel of the AM LCD.
However, the a-Si TFT has an amorphous structure due to the a-Si and thus exhibits low carrier mobility, which decreases the switching speed of the AM LCD.
Also, the a-Si TFT has other disadvantages, including unstable operation and a relatively low duty cycle.
In other words, the related art a-Si TFT is inferior to a crystalline-Si TFT in terms of characteristics such as conductivity and carrier mobility. Accordingly, there is a need for an improved method of manufacturing the crystalline-Si TFT.
Examples of crystalline-Si semiconductors include a polycrystalline-Si semiconductor, a microcrystalline (μc)-Si semiconductor, an a-Si semiconductor containing a crystalline component, and a semi-amorphous Si semiconductor having a structure which is intermediate between crystalline and non-crystalline.
Typically, a polycrystalline-Si semiconductor is obtained by forming an amorphous semiconductor layer and then crystallizing the amorphous semiconductor layer using laser beam energy. The throughput of this method is low, however, due to the small irradiation area of the laser beam. Also, the method cannot uniformly process an entire surface of a large substrate due to the insufficient stability of the laser beam.
To solve the above problems, a microcrystalline-Si TFT formed by CVD has been proposed. CVD is the same deposition technology used for the related art a-Si semiconductor.
However, in the case of the microcrystalline-Si TFT, when a microcrystalline-Si layer serving as an active layer is deposited on an amorphous layer, such as a silicon nitride (a-SiNx:H) gate insulating layer, an incubation layer is formed at the interface therebetween. This incubation layer may degrade in the characteristics of the TFT.
FIG. 2 is a view illustrating a microcrystalline silicon layer deposited on an amorphous gate insulating layer in a related art microcrystalline TFT. As shown in FIG. 2, an incubation layer 32 is formed at an interface between an amorphous gate insulating layer 30 and a microcrystalline-Si layer. This incubation layer 32 causes degradation in the characteristics of the TFT.